open_project fdtd_2d
set_top kernel_fdtd_2d
add_files fdtd_2d.cpp
add_files -tb "fdtd_2d_tb.cpp check.data"
open_solution solution1
set_part xc7z010clg400-1
create_clock -period 10 -name default
csim_design
csynth_design
cosim_design
exit
